3/4/2026 | 3:30 PM - 4:30 PM | Grand Peninsula B

A 3-stacked hybrid-shutter CMOS image sensor with driver-integrated signal delivery enhancement for high-resolution global operation

Author(s)

Su-Hyun Han | Samsung Electronics, Semiconductor, R&D Center
Hyukbin Kwon | Samsung Electronics, Semiconductor, R&D Center
Sung-Jae Byun | Samsung Electronics, Semiconductor, R&D Center
Daehee Bae | Samsung Electronics, Semiconductor, R&D Center
Gihwan Cho | Samsung Electronics, Semiconductor, R&D Center
Sanggwon Lee | Samsung Electronics, Semiconductor, R&D Center
Yong-Suk Choi | Samsung Electronics, Semiconductor, R&D Center
Si-Gyoung Koo | Samsung Electronics, Semiconductor, R&D Center
Heesung Shim | Samsung Electronics, Semiconductor, R&D Center
Min-Woong Seo | Samsung Electronics, Semiconductor, R&D Center
Jae-kyu Lee | Samsung Electronics, Semiconductor, R&D Center
Jonghyun Go | Samsung Electronics, Semiconductor, R&D Center

Details

This paper presents the world’s first 3-stacked hybrid shutter (HS) CMOS image sensor (CIS) for mobile application, featuring switchable operations between 0.6μm 4-photodiode 1.2μm-pitch 50Mp rolling shutter (RS) and 2.4μm-pitch 12.5Mp global shutter (GS). In the GS mode, where all sensors drive the entire row simultaneously, this sensor has leveraged innovative multi-state (MS) technology to improve the settling time of global signals, despite the load capacitance being larger by a factor equal to the number of rows compared to RS mode. This paper includes an analysis of the challenges encountered during the operation of the charge pump and negative transfer gate(NTG) regulator in GS mode, along with a guide for designing regulator for GS mode. This sensor achieves 52ke- full well capacity (FWC) and 2.4e- random noise (RN) in GS mode. While GS is more susceptible to noise compared to RS mode, it has effectively addressed this issue through its advanced 3-stack structure and high-capacity DRAM capacitor.